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Results for ATTORNEY: kivlin b. noel
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A microprocessor includes a programmable thermal sensor incorporated on an associated semiconductor die for generating a signal indicative of the temperature of the semiconductor die. The control signal is provided to a frequency synthesizer which controls the frequency of the CPU clock signal. The frequency synthesizer is dynamically controlled such that the frequency of the CPU clock signal is varied to run at an optimal frequency while preventing the microprocessor from overheating. In one em...
An integrated processor is provided that includes a CPU core coupled to a variety of on-chip peripheral devices such as a DMA controller, an interrupt controller, and a timer. The integrated processor further includes a power management message unit coupled to the DMA controller, interrupt controller, and timer for monitoring the internal interrupt and bus request signals of the integrated processor. The power management message unit may also monitor other selected activities of the integrated p...
A power management unit including a set of time-out counters and a software configurable state register is provided for managing power consumption within a computer system. Depending upon the state of the power management unit, a power control unit and a clock control unit are configured such that power may be applied or removed from certain components of the computer system and such that the frequencies of a CPU clock signal and a system clock signal may be raised or lowered. The power manageme...
A power management unit is provided that includes several states, each of which is associated with a different power management mode. Transitions between the states of the power management unit are dependent upon the type of activities detected. Upon reset of the computer system, the power management unit enters a ready state during which a CPU clock signal and a system clock signal are driven at their maximum frequencies. If no primary activities are detected over certain time periods, the powe...
A condom case is provided that houses one or more condoms within an enclosure having two distinct and interdependent locking mechanisms. Two separate keys must be employed simultaneously to disengage the locking mechanisms and open the condom case. The condom case pragmatically protects the condom while symbolically promoting the concepts of mutual consent, fidelity, dignity, commitment and intimacy. The keys may be worn around the necks of each individual as an overt talisman of their exclusive...
A cover for a folding lawn chair is provided to allow a person to conveniently carry the folding lawn chair as well as to increase comfort when the person is using the lawn chair. The cover may include an enveloped or flapped portion on each on its ends into which each end of the lawn chair can be situated. The cover thus remains in position on the lawn regardless of wind and movement by the user. The cover further includes a strap to accommodate convenient carrying of the lawn chair. The cover ...
An eyewear apparatus for use in sporting activities allows convenient view and control of a data display device by an athlete. A data display implant device including a data display and a lens is incorporated in association with sporting eyewear such as a pair of swimming goggles. The data display implant device may be an integral unit of the eyewear or may be a retrofit unit. A motion sensitive switch may also be included to cause freezing of the display device following each flip-turn of the s...
A system is disclosed for merging data from two separate registers at different locations in a computer system. A floppy drive controller is provided as part of a companion chip located separately from an IDE drive controller. Both controllers include a data register with the same address to make the system compatible with prior BIOS programs. The register in the floppy controller includes a DSK CHG bit as bit D7 of a direct input register (DIR), which is obtained from the DSK CHG# signal from t...
A symmetrical multiprocessing system is provided that includes centralized interrupt control unit. The interrupt control unit is coupled to a plurality of processing units and to a plurality of interrupt sources. The interrupt control unit advantageously allows for the expansion of each interrupt pin by setting the interrupt control unit in a cascade mode. Furthermore, the central control unit is responsive to specialized interrupt cycles which allows I/O devices and/or bus bridge devices to ini...
A symmetrical multiprocessing system is provided that includes centralized interrupt control unit. The interrupt control unit is coupled to a plurality of processing units and to a plurality of interrupt sources. The interrupt control unit advantageously allows for the expansion of each interrupt pin by setting the interrupt control unit in a cascade mode. Furthermore, the central control unit is responsive to specialized interrupt cycles which allows I/O devices and/or bus bridge devices to ini...
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