A signal matching signal substitution system includes a tuner for selectively receiving signals in respective television channels with an input gain control for controlling the signal output level of the tuner. The system substitutes television signals in a substitute channel in lieu of normal signals in a normal channel selected by a viewer. The system has a component for determining the input signal level of currently received signals in a currently received channel and generating a current am...

A signal encoder and a signal decoder involves the signal encoder for receiving a data signal and a clock signal, including a first code output terminal and a second code output terminal. When the data signal is logic one, the signal encoder outputs a modulated signal through the first code output terminal, and outputs a fixed level signal through the second code output terminal. When the data signal is logic zero, the signal encoder outputs the fixed level signal through the first code output t...

A signal processing method for an analogue picture signal is proposed. In this case, the analogue picture signal originates from a computing unit (10) in which the signal was generated digitally in accordance with a graphics standard such as, for example, EGA or VGA and was subsequently converted into analogue form. The method consists in subjecting the analogue picture signal to analogue/digital conversion at a first chosen sampling frequency, after which the sampled picture is then investigate...

A signal transmitter and a signal receiver comprises a time base compression part (101) for compressing an audio signal on a time base to output the compressed signal as a time base compressed audio signal and a multiplexing part (102) for multiplexing a video signal, a control signal, and the time base compressed audio signal to output the multiplexed signal to the external as a video/audio control multiplexed signal. The thus constituted signal transmitter and the signal receiver realize a sig...

Provided is a signal processor for converting a signal that converts a return to zero (RZ) signal into a non-return to zero (NRZ) signal, in which two 2R (re-amplifying, re-shaping) regenerators are connected in parallel between an input waveguide and an output waveguide with different lengths from each other. The 2R regenerator includes: two semiconductor optical amplifiers having different lengths from each other; and phase control means connected to a short semiconductor optical amplifier. Th...

Binary input data or analog voltages are processed in parallel paths to form a bi-level (coarse and fine) output. A binary input is parallel processed to produce an analog current output and an analog input is parallel processed to produce a binary coded output. For binary-to-analog conversion, analog multiplexing and scaling adjusts the fine current to the coarse current prior to summing into a composite analog output. An analog input is continuously available to a comparator that senses voltag...

A signal converter for converting a varying input voltage, such as an output signal from a detector, into an output voltage in absolute value, including an operational amplifier, a comparator and two groups of electronic switches. The comparator compares the varying input voltage to a predetermined reference voltage. The operational amplifier has negative and positive input terminals and generates an output voltage signal in proportion to the difference between the voltages applied to its two in...

A signal device for use in connection with supermarket check-out counters to indicate check-out conditions at a particular location. The device includes a support pole and a housing mounted on the support pole. The housing is adapted to removably receive and hold a plurality of signal panels in position to be readily visually observed. The panels are interchangeable and have predetermined indicia thereon to enable the selection of a particular pattern to be observed while in the housing as a vis...

A signal processor for use in a small, lightweight radar-guided missile to provide a discrete Fast Fourier Transform (FFT) on received radar return signals. The radar return signals are converted into a sequence of binary digits enabling a simple decoder to perform complex addition and subtraction processing, thereby minimizing the space and complexity of the signal processor.

A signal receiver employing constant false alarm rate (CFAR) circuitry is disclosed. The CFAR circuitry includes a dispersive delay line for stretching received echo signals, means for limiting the stretched echo signals and an inverse dispersive delay line for finally processing the stretched and limited echo signals. With delay lines of proper characteristics, the just-outlined processing of echo signals results in reconstituted signals, the amplitude of each one of such reconstituted signals ...